Debugging with Transactional Memory
نویسندگان
چکیده
Transactional programming promises to substantially simplify the development of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. To our knowledge, nobody has yet addressed issues involved with debugging programs executed using transactional memory. Because transactional memory implementations provide the “illusion” of multiple memory locations changing value atomically, while in fact they do not, there are challenges involved with integrating debuggers with such programs to provide the user with a coherent view of program execution. This paper shows how to overcome these problems by making the debugger interact with transactional memory implementations in a meaningful way. In addition to describing how “standard” debugging functionality can be integrated with transactional memory implementations, we also describe some powerful new debugging mechanisms that are enabled by transactional memory infrastructure. Our description focuses on how to enable debugging in software and hybrid software-hardware transactional memory systems.
منابع مشابه
Towards a Fully Pessimistic STM Model
The designs of software transactional memory (STM) algorithms to date have been optimistic: transactions that run into inconsistencies abort and retry. The common view is that this optimistic approach gives significant performance benefits, and yet we know that it also results in complex programming, limitations on what can be executed within a transaction, and difficult debugging. This is a bu...
متن کاملBut How Do We Really Debug Transactional Memory Programs?
With recent announcements of hardware transactional memory (HTM) systems from IBM and Intel, HTM will soon be available for widescale adoption. Such platforms, combined with tested and stable software transactional memory systems, are likely to make real transactional memory (TM) systems available for the first time, which promises to be a more attractive alternative than lock-based parallel pr...
متن کاملSystem Challenges and Opportunities for Transactional Memory a Dissertation Submitted to the Department of Electrical Engineering and the Committee on Graduate Studies of Stanford University in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy
Recent trends in architecture have made chip multiprocessors (CMPs) increasingly common. CMPs provide programmers with an unprecedented opportunity for parallel execution. Nevertheless, the key factor limiting their potential is the complexity of parallel application development using primitives such as locks and condition variables. While transactional memory (TM) is a technique that helps wit...
متن کاملSynchronization Aware Conflict Resolution for Runtime Monitoring Using Transactional Memory
There has been significant research on performing runtime monitoring of programs using dynamic binary translation (DBT) techniques for a variety of purposes including program profiling, debugging, and security. However, such software monitoring frameworks currently handle only sequential programs efficiently. When handling multithreaded programs, such tools often encounter racing problems and r...
متن کاملBrief Announcement: RaceTM – Detecting Data Races Using Transactional Memory
Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to more hardware concurrency. Dependable multithreaded software will have to rely on the ability to dynamically detect data races, which are non-deterministic and notoriously hard to reproduce symptoms of synchronization bugs. In this paper, we propose RaceTM, a novel approach that ...
متن کامل